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dev0
2025-12-25 20:33:17 +05:30
parent 3e0566c288
commit 45403c94ac
10 changed files with 644 additions and 4 deletions
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3
Tests/Unit/CMakeLists.txt
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@ -20,6 +20,9 @@ set(TEST_SOURCES
ProcessOps.cpp
StreamReader.cpp
RingBuffer.cpp
SIMD/IntVec4.cpp
SIMD/FloatVec4.cpp
)
add_executable(IACore_Test_Suite ${TEST_SOURCES})

106
Tests/Unit/SIMD/FloatVec4.cpp Normal file
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@ -0,0 +1,106 @@
// IACore-OSS; The Core Library for All IA Open Source Projects
// Copyright (C) 2025 IAS (ias@iasoft.dev)
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <IACore/SIMD.hpp>
#include <IACore/IATest.hpp>
using namespace IACore;
IAT_BEGIN_BLOCK(Core, FloatVec4)
BOOL TestFloatArithmetic()
{
FloatVec4 v1(10.0f, 20.0f, 30.0f, 40.0f);
FloatVec4 v2(2.0f, 4.0f, 5.0f, 8.0f);
ALIGN(16) FLOAT32 res[4];
(v1 / v2).Store(res);
IAT_CHECK_APPROX(res[0], 5.0f);
IAT_CHECK_APPROX(res[3], 5.0f);
(v1 * v2).Store(res);
IAT_CHECK_APPROX(res[0], 20.0f);
(v1 + v2).Store(res);
IAT_CHECK_APPROX(res[0], 12.0f);
return TRUE;
}
BOOL TestMathHelpers()
{
ALIGN(16) FLOAT32 res[4];
FloatVec4 vSq(4.0f, 9.0f, 16.0f, 25.0f);
vSq.Sqrt().Store(res);
IAT_CHECK_APPROX(res[0], 2.0f);
IAT_CHECK_APPROX(res[3], 5.0f);
FloatVec4 vNeg(-1.0f, -5.0f, 10.0f, -0.0f);
vNeg.Abs().Store(res);
IAT_CHECK_APPROX(res[0], 1.0f);
IAT_CHECK_APPROX(res[2], 10.0f);
FloatVec4 vClamp(-100.0f, 0.0f, 50.0f, 200.0f);
vClamp.Clamp(0.0f, 100.0f).Store(res);
IAT_CHECK_APPROX(res[0], 0.0f);
IAT_CHECK_APPROX(res[2], 50.0f);
IAT_CHECK_APPROX(res[3], 100.0f);
return TRUE;
}
BOOL TestApproxMath()
{
ALIGN(16) FLOAT32 res[4];
FloatVec4 v(16.0f, 25.0f, 100.0f, 1.0f);
v.Rsqrt().Store(res);
IAT_CHECK_APPROX(res[0], 0.25f);
IAT_CHECK_APPROX(res[2], 0.1f);
return TRUE;
}
BOOL TestLinearAlgebra()
{
FloatVec4 v1(1.0f, 2.0f, 3.0f, 4.0f);
FloatVec4 v2(1.0f, 0.0f, 1.0f, 0.0f);
FLOAT32 dot = v1.Dot(v2);
IAT_CHECK_APPROX(dot, 4.0f);
FloatVec4 vNorm(10.0f, 0.0f, 0.0f, 0.0f);
ALIGN(16) FLOAT32 res[4];
vNorm.Normalize().Store(res);
IAT_CHECK_APPROX(res[0], 1.0f);
IAT_CHECK_APPROX(res[1], 0.0f);
return TRUE;
}
IAT_BEGIN_TEST_LIST()
IAT_ADD_TEST(TestFloatArithmetic);
IAT_ADD_TEST(TestMathHelpers);
IAT_ADD_TEST(TestApproxMath);
IAT_ADD_TEST(TestLinearAlgebra);
IAT_END_TEST_LIST()
IAT_END_BLOCK()
IAT_REGISTER_ENTRY(Core, FloatVec4)

152
Tests/Unit/SIMD/IntVec4.cpp Normal file
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@ -0,0 +1,152 @@
// IACore-OSS; The Core Library for All IA Open Source Projects
// Copyright (C) 2025 IAS (ias@iasoft.dev)
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
// IACore-OSS; The Core Library for All IA Open Source Projects
// Copyright (C) 2025 IAS (ias@iasoft.dev)
#include <IACore/SIMD.hpp>
#include <IACore/IATest.hpp>
using namespace IACore;
IAT_BEGIN_BLOCK(Core, IntVec4)
BOOL TestConstructors()
{
IntVec4 vBroadcast(10);
ALIGN(16) UINT32 storeBuf[4];
vBroadcast.Store(storeBuf);
IAT_CHECK_EQ(storeBuf[0], 10U);
IAT_CHECK_EQ(storeBuf[3], 10U);
IntVec4 vComp(1, 2, 3, 4);
vComp.Store(storeBuf);
IAT_CHECK_EQ(storeBuf[0], 1U);
IAT_CHECK_EQ(storeBuf[3], 4U);
ALIGN(16) UINT32 srcBuf[4] = {100, 200, 300, 400};
IntVec4 vLoad = IntVec4::Load(srcBuf);
vLoad.Store(storeBuf);
IAT_CHECK_EQ(storeBuf[1], 200U);
return TRUE;
}
BOOL TestArithmetic()
{
IntVec4 v1(10, 20, 30, 40);
IntVec4 v2(1, 2, 3, 4);
IntVec4 vAdd = v1 + v2;
ALIGN(16) UINT32 res[4];
vAdd.Store(res);
IAT_CHECK_EQ(res[0], 11U);
IAT_CHECK_EQ(res[3], 44U);
IntVec4 vSub = v1 - v2;
vSub.Store(res);
IAT_CHECK_EQ(res[0], 9U);
IntVec4 vMul = v1 * v2;
vMul.Store(res);
IAT_CHECK_EQ(res[0], 10U);
IAT_CHECK_EQ(res[2], 90U);
IAT_CHECK_EQ(res[3], 160U);
return TRUE;
}
BOOL TestBitwise()
{
IntVec4 vAllOnes(0xFFFFFFFF);
IntVec4 vZero((UINT32) 0);
IntVec4 vPattern(0xAAAAAAAA);
ALIGN(16) UINT32 res[4];
(vAllOnes & vPattern).Store(res);
IAT_CHECK_EQ(res[0], 0xAAAAAAAAU);
(vZero | vPattern).Store(res);
IAT_CHECK_EQ(res[0], 0xAAAAAAAAU);
(vAllOnes ^ vPattern).Store(res);
IAT_CHECK_EQ(res[0], 0x55555555U);
(~vPattern).Store(res);
IAT_CHECK_EQ(res[0], 0x55555555U);
IntVec4 vShift(1);
(vShift << 1).Store(res);
IAT_CHECK_EQ(res[0], 2U);
IntVec4 vShiftRight(4);
(vShiftRight >> 1).Store(res);
IAT_CHECK_EQ(res[0], 2U);
return TRUE;
}
BOOL TestSaturation()
{
UINT32 max = 0xFFFFFFFF;
IntVec4 vHigh(max - 10);
IntVec4 vAdd(20);
ALIGN(16) UINT32 res[4];
vHigh.SatAdd(vAdd).Store(res);
IAT_CHECK_EQ(res[0], max);
IntVec4 vLow(10);
IntVec4 vSub(20);
vLow.SatSub(vSub).Store(res);
IAT_CHECK_EQ(res[0], 0U);
return TRUE;
}
BOOL TestAdvancedOps()
{
IntVec4 v(0, 50, 100, 150);
ALIGN(16) UINT32 res[4];
v.Clamp(40, 110).Store(res);
IAT_CHECK_EQ(res[0], 40U);
IAT_CHECK_EQ(res[1], 50U);
IAT_CHECK_EQ(res[2], 100U);
IAT_CHECK_EQ(res[3], 110U);
IntVec4 A(2);
IntVec4 B(10);
IntVec4 C(5);
A.MultAdd(B, C).Store(res);
IAT_CHECK_EQ(res[0], 25U);
return TRUE;
}
IAT_BEGIN_TEST_LIST()
IAT_ADD_TEST(TestConstructors);
IAT_ADD_TEST(TestArithmetic);
IAT_ADD_TEST(TestBitwise);
IAT_ADD_TEST(TestSaturation);
IAT_ADD_TEST(TestAdvancedOps);
IAT_END_TEST_LIST()
IAT_END_BLOCK()
IAT_REGISTER_ENTRY(Core, IntVec4)