From 74678d4c4f15041de950d5c454e7131e53a75e0c Mon Sep 17 00:00:00 2001 From: dev0 Date: Sun, 21 Dec 2025 02:03:49 +0530 Subject: [PATCH] [FEAT]: Platform, Hardware CRC32, xxHash --- CMakePresets.json | 16 ++ Src/IACore/CMakeLists.txt | 3 +- Src/IACore/imp/cpp/DataOps.cpp | 267 +++++++++++++++++++++++------ Src/IACore/imp/cpp/IACore.cpp | 15 +- Src/IACore/imp/cpp/Platform.cpp | 120 +++++++++++++ Src/IACore/inc/IACore/DataOps.hpp | 7 +- Src/IACore/inc/IACore/IACore.hpp | 5 +- Src/IACore/inc/IACore/PCH.hpp | 21 ++- Src/IACore/inc/IACore/Platform.hpp | 63 +++++++ 9 files changed, 447 insertions(+), 70 deletions(-) create mode 100644 Src/IACore/imp/cpp/Platform.cpp create mode 100644 Src/IACore/inc/IACore/Platform.hpp diff --git a/CMakePresets.json b/CMakePresets.json index 6d4363e..57d8177 100644 --- a/CMakePresets.json +++ b/CMakePresets.json @@ -62,6 +62,17 @@ "cacheVariables": { "IS_CI_BUILD": "ON" } + }, + { + "name": "wasm-default", + "displayName": "WebAssembly (Emscripten)", + "description": "Build using Emscripten toolchain", + "generator": "Ninja", + "binaryDir": "${sourceDir}/out/build/wasm-release", + "toolchainFile": "$env{EMSDK}/upstream/emscripten/cmake/Modules/Platform/Emscripten.cmake", + "cacheVariables": { + "CMAKE_CXX_FLAGS": "-msimd128 -pthread" + } } ], "buildPresets": [ @@ -85,6 +96,11 @@ "rhs": "Windows" } }, + { + "name": "linux-wasm-debug", + "configurePreset": "wasm-default", + "configuration": "Debug" + }, { "name": "linux-ci-release", "configurePreset": "linux-ci", diff --git a/Src/IACore/CMakeLists.txt b/Src/IACore/CMakeLists.txt index 00ba368..d4fe72b 100644 --- a/Src/IACore/CMakeLists.txt +++ b/Src/IACore/CMakeLists.txt @@ -5,8 +5,9 @@ set(SRC_FILES "imp/cpp/IACore.cpp" "imp/cpp/Logger.cpp" "imp/cpp/FileOps.cpp" - "imp/cpp/AsyncOps.cpp" "imp/cpp/DataOps.cpp" + "imp/cpp/AsyncOps.cpp" + "imp/cpp/Platform.cpp" "imp/cpp/SocketOps.cpp" "imp/cpp/StringOps.cpp" "imp/cpp/ProcessOps.cpp" diff --git a/Src/IACore/imp/cpp/DataOps.cpp b/Src/IACore/imp/cpp/DataOps.cpp index ad68902..4b3c453 100644 --- a/Src/IACore/imp/cpp/DataOps.cpp +++ b/Src/IACore/imp/cpp/DataOps.cpp @@ -14,52 +14,222 @@ // limitations under the License. #include +#include #include #include namespace IACore { - STATIC CONSTEXPR UINT32 CRC32_TABLE[] = { - /* CRC polynomial 0xedb88320 */ - 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, 0x0edb8832, - 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2, - 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, 0x136c9856, 0x646ba8c0, 0xfd62f97a, - 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, - 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, - 0x45df5c75, 0xdcd60dcf, 0xabd13d59, 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, - 0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, - 0xb6662d3d, 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, - 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, 0x6b6b51f4, - 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950, - 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, 0x4db26158, 0x3ab551ce, 0xa3bc0074, - 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, - 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, - 0x206f85b3, 0xb966d409, 0xce61e49f, 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, - 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, - 0x73dc1683, 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, - 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, 0xfed41b76, - 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e, - 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, - 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, - 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, - 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, - 0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, - 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, - 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, 0xa00ae278, - 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, - 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, 0xbdbdf21c, 0xcabac28a, 0x53b39330, - 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, - 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d, + template INLINE T ReadUnaligned(IN PCUINT8 ptr) + { + T v; + std::memcpy(&v, ptr, sizeof(T)); + return v; + } + + struct CRC32Tables + { + UINT32 table[8][256] = {}; + + CONSTEVAL CRC32Tables() + { + CONSTEXPR UINT32 t = 0x82F63B78; + + for (UINT32 i = 0; i < 256; i++) + { + UINT32 crc = i; + for (int j = 0; j < 8; j++) + crc = (crc >> 1) ^ ((crc & 1) ? t : 0); + table[0][i] = crc; + } + + for (int i = 0; i < 256; i++) + { + for (int slice = 1; slice < 8; slice++) + { + UINT32 prev = table[slice - 1][i]; + table[slice][i] = (prev >> 8) ^ table[0][prev & 0xFF]; + } + } + } }; - // FNV-1a 32-bit Constants - constexpr uint32_t FNV1A_32_PRIME = 0x01000193; // 16777619 - constexpr uint32_t FNV1A_32_OFFSET = 0x811c9dc5; // 2166136261 + STATIC CONSTEXPR CRC32Tables CRC32_TABLES{}; - UINT32 DataOps::Hash(IN CONST String &string) +#if IA_ARCH_X64 + INLINE UINT32 CRC32_x64_HW(IN Span data) { - uint32_t hash = FNV1A_32_OFFSET; + CONST UINT8 *p = data.data(); + + UINT32 crc = 0xFFFFFFFF; + SIZE_T len = data.size(); + + while (len >= 8) + { + UINT64 chunk = ReadUnaligned(p); + crc = (UINT32) _mm_crc32_u64((UINT64) crc, chunk); + p += 8; + len -= 8; + } + + while (len--) + crc = _mm_crc32_u8(crc, *p++); + + return ~crc; + } +#endif + +#if IA_ARCH_ARM64 + __attribute__((target("+crc"))) INLINE UINT32 CRC32_ARM64_HW(IN Span data) + { + CONST UINT8 *p = data.data(); + + UINT32 crc = 0xFFFFFFFF; + SIZE_T len = data.size(); + + while (len >= 8) + { + UINT64 chunk = ReadUnaligned(p); + crc = __crc32cd(crc, chunk); + p += 8; + len -= 8; + } + + while (len--) + crc = __crc32cb(crc, *p++); + + return ~crc; + } +#endif + + INLINE UINT32 CRC32_Software_Slice8(IN Span data) + { + CONST UINT8 *p = data.data(); + UINT32 crc = 0xFFFFFFFF; + SIZE_T len = data.size(); + + while (len >= 8) + { + UINT32 term1 = crc ^ ReadUnaligned(p); + UINT32 term2 = ReadUnaligned(p + 4); + + crc = CRC32_TABLES.table[7][term1 & 0xFF] ^ CRC32_TABLES.table[6][(term1 >> 8) & 0xFF] ^ + CRC32_TABLES.table[5][(term1 >> 16) & 0xFF] ^ CRC32_TABLES.table[4][(term1 >> 24)] ^ + CRC32_TABLES.table[3][term2 & 0xFF] ^ CRC32_TABLES.table[2][(term2 >> 8) & 0xFF] ^ + CRC32_TABLES.table[1][(term2 >> 16) & 0xFF] ^ CRC32_TABLES.table[0][(term2 >> 24)]; + + p += 8; + len -= 8; + } + + while (len--) + crc = (crc >> 8) ^ CRC32_TABLES.table[0][(crc ^ *p++) & 0xFF]; + + return ~crc; + } + + UINT32 DataOps::CRC32(IN Span data) + { +#if IA_ARCH_X64 + // IACore mandates AVX2 so no need to check + // for Platform::GetCapabilities().HardwareCRC32 + return CRC32_x64_HW(data); +#elif IA_ARCH_ARM64 + if (Platform::GetCapabilities().HardwareCRC32) + return CRC32_ARM64_HW(data); +#endif + return CRC32_Software_Slice8(data); + } +} // namespace IACore + +namespace IACore +{ + CONSTEXPR UINT32 XXH_PRIME32_1 = 0x9E3779B1U; + CONSTEXPR UINT32 XXH_PRIME32_2 = 0x85EBCA6BU; + CONSTEXPR UINT32 XXH_PRIME32_3 = 0xC2B2AE35U; + CONSTEXPR UINT32 XXH_PRIME32_4 = 0x27D4EB2FU; + CONSTEXPR UINT32 XXH_PRIME32_5 = 0x165667B1U; + + INLINE UINT32 XXH32_Round(IN UINT32 seed, IN UINT32 input) + { + seed += input * XXH_PRIME32_2; + seed = std::rotl(seed, 13); + seed *= XXH_PRIME32_1; + return seed; + } + + UINT32 DataOps::Hash_xxHash(IN CONST String &string) + { + return Hash_xxHash(Span(reinterpret_cast(string.data()), string.size())); + } + + UINT32 DataOps::Hash_xxHash(IN Span data) + { + CONST UINT8 *p = data.data(); + CONST UINT8 *CONST bEnd = p + data.size(); + UINT32 h32{}; + + if (data.size() >= 16) + { + const UINT8 *const limit = bEnd - 16; + + UINT32 v1 = XXH_PRIME32_1 + XXH_PRIME32_2; + UINT32 v2 = XXH_PRIME32_2; + UINT32 v3 = 0; + UINT32 v4 = -XXH_PRIME32_1; + + do + { + v1 = XXH32_Round(v1, ReadUnaligned(p)); + p += 4; + v2 = XXH32_Round(v2, ReadUnaligned(p)); + p += 4; + v3 = XXH32_Round(v3, ReadUnaligned(p)); + p += 4; + v4 = XXH32_Round(v4, ReadUnaligned(p)); + p += 4; + } while (p <= limit); + + h32 = std::rotl(v1, 1) + std::rotl(v2, 7) + std::rotl(v3, 12) + std::rotl(v4, 18); + } + else + h32 = XXH_PRIME32_5; + + h32 += (UINT32) data.size(); + + while (p + 4 <= bEnd) + { + h32 += ReadUnaligned(p) * XXH_PRIME32_3; + h32 = std::rotl(h32, 17) * XXH_PRIME32_4; + p += 4; + } + + while (p < bEnd) + { + h32 += (*p++) * XXH_PRIME32_5; + h32 = std::rotl(h32, 11) * XXH_PRIME32_1; + } + + h32 ^= h32 >> 15; + h32 *= XXH_PRIME32_2; + h32 ^= h32 >> 13; + h32 *= XXH_PRIME32_3; + h32 ^= h32 >> 16; + + return h32; + } +} // namespace IACore + +namespace IACore +{ + // FNV-1a 32-bit Constants + CONSTEXPR UINT32 FNV1A_32_PRIME = 0x01000193; + CONSTEXPR UINT32 FNV1A_32_OFFSET = 0x811c9dc5; + + UINT32 DataOps::Hash_FNV1A(IN CONST String &string) + { + UINT32 hash = FNV1A_32_OFFSET; for (char c : string) { hash ^= static_cast(c); @@ -68,9 +238,9 @@ namespace IACore return hash; } - UINT32 DataOps::Hash(IN Span data) + UINT32 DataOps::Hash_FNV1A(IN Span data) { - uint32_t hash = FNV1A_32_OFFSET; + UINT32 hash = FNV1A_32_OFFSET; const uint8_t *ptr = static_cast(data.data()); for (size_t i = 0; i < data.size(); ++i) @@ -80,25 +250,10 @@ namespace IACore } return hash; } +} // namespace IACore - UINT32 DataOps::CRC32(IN Span _data) - { - UINT32 crc32 = 0xFFFFFFFF; - -#define UPDC32(octet, crc) (CRC32_TABLE[((crc) ^ ((UINT8) octet)) & 0xff] ^ ((crc) >> 8)) - - auto data = _data.data(); - auto size = _data.size(); - for (; size; --size, ++data) - { - crc32 = UPDC32(*data, crc32); - } - -#undef UPDC32 - - return ~crc32; - } - +namespace IACore +{ DataOps::CompressionType DataOps::DetectCompression(IN Span data) { if (data.size() < 2) diff --git a/Src/IACore/imp/cpp/IACore.cpp b/Src/IACore/imp/cpp/IACore.cpp index 3bce997..a5d7ef2 100644 --- a/Src/IACore/imp/cpp/IACore.cpp +++ b/Src/IACore/imp/cpp/IACore.cpp @@ -20,9 +20,13 @@ namespace IACore { HighResTimePoint g_startTime{}; std::thread::id g_mainThreadID{}; + INT32 g_coreInitCount{}; VOID Initialize() { + g_coreInitCount++; + if (g_coreInitCount > 1) + return; g_mainThreadID = std::this_thread::get_id(); g_startTime = HighResClock::now(); Logger::Initialize(); @@ -30,6 +34,9 @@ namespace IACore VOID Terminate() { + g_coreInitCount--; + if (g_coreInitCount > 0) + return; Logger::Terminate(); } @@ -54,16 +61,14 @@ namespace IACore return static_cast(rand()) / static_cast(RAND_MAX); } - UINT32 GetRandom(IN UINT32 seed) + UINT64 GetRandom(IN UINT64 max) { - srand(seed); - return (UINT32) GetRandom(0, UINT32_MAX); + return max * GetRandom(); } INT64 GetRandom(IN INT64 min, IN INT64 max) { - const auto t = static_cast(rand()) / static_cast(RAND_MAX); - return min + (max - min) * t; + return min + (max - min) * GetRandom(); } VOID Sleep(IN UINT64 milliseconds) diff --git a/Src/IACore/imp/cpp/Platform.cpp b/Src/IACore/imp/cpp/Platform.cpp new file mode 100644 index 0000000..dbf1d50 --- /dev/null +++ b/Src/IACore/imp/cpp/Platform.cpp @@ -0,0 +1,120 @@ +// IACore-OSS; The Core Library for All IA Open Source Projects +// Copyright (C) 2025 IAS (ias@iasoft.dev) +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include + +#if IA_ARCH_X64 + +# ifndef _MSC_VER +# include +# endif + +#elif IA_ARCH_ARM64 + +# if defined(__linux__) || defined(__ANDROID__) +# include +# include +# endif + +#endif + +namespace IACore +{ + Platform::Capabilities Platform::s_capabilities{}; + +#if IA_ARCH_X64 + VOID Platform::CPUID(IN INT32 function, IN INT32 subFunction, OUT INT32 out[4]) + { +# ifdef _MSC_VER + __cpuidex(out, function, subFunction); +# else + __cpuid_count(function, subFunction, out[0], out[1], out[2], out[3]); +# endif + } +#endif + + BOOL Platform::CheckCPU() + { +#if IA_ARCH_X64 + INT32 cpuInfo[4]; + + CPUID(0, 0, cpuInfo); + if (cpuInfo[0] < 7) + return false; + + CPUID(1, 0, cpuInfo); + BOOL osxsave = (cpuInfo[2] & (1 << 27)) != 0; + BOOL avx = (cpuInfo[2] & (1 << 28)) != 0; + BOOL fma = (cpuInfo[2] & (1 << 12)) != 0; + if (!osxsave || !avx || !fma) + return false; + + UINT64 xcrFeatureMask = _xgetbv(0); + if ((xcrFeatureMask & 0x6) != 0x6) + return false; + + CPUID(7, 0, cpuInfo); + BOOL avx2 = (cpuInfo[1] & (1 << 5)) != 0; + if (!avx2) + return false; + + s_capabilities.HardwareCRC32 = TRUE; +#elif IA_ARCH_ARM64 +# if defined(__linux__) || defined(__ANDROID__) + unsigned long hw_caps = getauxval(AT_HWCAP); + +# ifndef HWCAP_CRC32 +# define HWCAP_CRC32 (1 << 7) +# endif + + s_capabilities.HardwareCRC32 = hw_caps & HWCAP_CRC32; +# elif defined(__APPLE__) + // Apple silicon always has hardware CRC32 + s_capabilities.HardwareCRC32 = TRUE; +# else + s_capabilities.HardwareCRC32 = FALSE; +# endif +#else + s_capabilities.HardwareCRC32 = FALSE; +#endif + return true; + } + + PCCHAR Platform::GetArchitectureName() + { +#if IA_ARCH_X64 + return "x86_64"; +#elif IA_ARCH_ARM64 + return "aarch64"; +#elif IA_ARCH_WASM + return "wasm"; +#endif + } + + PCCHAR Platform::GetOperatingSystemName() + { +#if IA_PLATFORM_WINDOWS + return "Windows"; +#elif IA_PLATFORM_IOS + return "iOS"; +#elif IA_PLATFORM_MAC + return "Mac"; +#elif IA_PLATFORM_ANDROID + return "Android"; +#elif IA_PLATFORM_LINUX + return "Linux"; +#endif + } +} // namespace IACore \ No newline at end of file diff --git a/Src/IACore/inc/IACore/DataOps.hpp b/Src/IACore/inc/IACore/DataOps.hpp index 2501d3c..1e6b092 100644 --- a/Src/IACore/inc/IACore/DataOps.hpp +++ b/Src/IACore/inc/IACore/DataOps.hpp @@ -30,8 +30,11 @@ namespace IACore }; public: - STATIC UINT32 Hash(IN CONST String &string); - STATIC UINT32 Hash(IN Span data); + STATIC UINT32 Hash_FNV1A(IN CONST String &string); + STATIC UINT32 Hash_FNV1A(IN Span data); + + STATIC UINT32 Hash_xxHash(IN CONST String &string); + STATIC UINT32 Hash_xxHash(IN Span data); STATIC UINT32 CRC32(IN Span data); diff --git a/Src/IACore/inc/IACore/IACore.hpp b/Src/IACore/inc/IACore/IACore.hpp index 08d24e7..c4ab1d7 100644 --- a/Src/IACore/inc/IACore/IACore.hpp +++ b/Src/IACore/inc/IACore/IACore.hpp @@ -22,8 +22,11 @@ namespace IACore { // Must be called from main thread + // Safe to call multiple times but, every Initialize call is paired with a corresponding Terminate call VOID Initialize(); + // Must be called from same thread as Initialize + // Safe to call multiple times but, every Initialize call is paired with a corresponding Terminate call VOID Terminate(); UINT64 GetUnixTime(); @@ -31,8 +34,8 @@ namespace IACore FLOAT64 GetSecondsCount(); FLOAT32 GetRandom(); - UINT32 GetRandom(IN UINT32 seed); INT64 GetRandom(IN INT64 min, IN INT64 max); + UINT64 GetRandom(IN UINT64 max); BOOL IsMainThread(); VOID Sleep(IN UINT64 milliseconds); diff --git a/Src/IACore/inc/IACore/PCH.hpp b/Src/IACore/inc/IACore/PCH.hpp index c37bb8e..7418974 100644 --- a/Src/IACore/inc/IACore/PCH.hpp +++ b/Src/IACore/inc/IACore/PCH.hpp @@ -18,13 +18,22 @@ // ------------------------------------------------------------------------- // Platform Detection // ------------------------------------------------------------------------- +#if defined(__x86_64__) || defined(_M_X64) || defined(_M_AMD64) +# define IA_ARCH_X64 1 +#elif defined(__aarch64__) || defined(_M_ARM64) +# define IA_ARCH_ARM64 1 +#elif defined(__wasm__) || defined(__wasm32__) || defined(__wasm64__) +# define IA_ARCH_WASM 1 +#else +# error "IACore: Unsupported Architecture. Only x64, ARM64, and WASM are supported." +#endif + #if defined(WIN32) || defined(_WIN32) || defined(__WIN32__) || defined(__NT__) # ifdef _WIN64 # define IA_PLATFORM_WIN64 1 # define IA_PLATFORM_WINDOWS 1 # else -# define IA_PLATFORM_WIN32 1 -# define IA_PLATFORM_WINDOWS 1 +# error "IACore: 32-bit Windows is not supported" # endif #elif __APPLE__ # include @@ -41,11 +50,11 @@ #elif __linux__ # define IA_PLATFORM_LINUX 1 # define IA_PLATFORM_UNIX 1 -#elif __unix__ -# define IA_PLATFORM_UNIX 1 +#else +# error "IACore: Unsupported Platform. Only Windows, Linux, MacOS, Android and iOS are supported." #endif -#if IA_PLATFORM_WIN32 || IA_PLATFORM_WIN64 +#if IA_PLATFORM_WIN64 # ifndef WIN32_LEAN_AND_MEAN # define WIN32_LEAN_AND_MEAN # endif @@ -184,6 +193,7 @@ # define VIRTUAL virtual # define OVERRIDE override # define CONSTEXPR constexpr +# define CONSTEVAL consteval # define NOEXCEPT noexcept # define NULLPTR nullptr # define IA_MOVE(...) std::move(__VA_ARGS__) @@ -193,6 +203,7 @@ # define VIRTUAL # define OVERRIDE # define CONSTEXPR const +# define CONSTEVAL # define NOEXCEPT # define NULLPTR NULL # define IA_MOVE(...) (__VA_ARGS__) diff --git a/Src/IACore/inc/IACore/Platform.hpp b/Src/IACore/inc/IACore/Platform.hpp new file mode 100644 index 0000000..79792c9 --- /dev/null +++ b/Src/IACore/inc/IACore/Platform.hpp @@ -0,0 +1,63 @@ +// IACore-OSS; The Core Library for All IA Open Source Projects +// Copyright (C) 2025 IAS (ias@iasoft.dev) +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#pragma once + +#include + +#if IA_ARCH_X64 + +# ifdef _MSC_VER +# include +# else +# include +# endif + +#elif IA_ARCH_ARM64 + +# include + +#endif + +namespace IACore +{ + class Platform + { + public: + struct Capabilities + { + BOOL HardwareCRC32{FALSE}; + }; + + public: + STATIC BOOL CheckCPU(); + +#if IA_ARCH_X64 + STATIC VOID CPUID(IN INT32 function, IN INT32 subFunction, OUT INT32 out[4]); +#endif + + STATIC PCCHAR GetArchitectureName(); + STATIC PCCHAR GetOperatingSystemName(); + + public: + STATIC CONST Capabilities &GetCapabilities() + { + return s_capabilities; + } + + private: + STATIC Capabilities s_capabilities; + }; +} // namespace IACore \ No newline at end of file